The digital representation of waveforms is a technology that is central to various sectors of industry where the detection of periodic and non-periodic waveforms can be critical to determining whether an erratic heartbeat, electrical short circuit, or some other problem exists. A digital representation must clearly and accurately represent the analog source of a waveform, but at the same time be able to accomplish such things as, compressing the incoming data into some manageable size, and maintain the integrity of the incoming data (i.e., making sure that the digital representation has enough fidelity to the original signal to be useful). Of additional import is the ability to have a digital representation that can consistently allow one to identify the presence and location of certain wave features, and/or that lends itself to certain types of automated analyses.
High-fidelity digital representations are problematic for a number of reasons. First, they require relatively large amounts of space within which to store the digitized data. Put another way, the higher the fidelity of the digitized data, the larger the amount of storage needed. Another problem with high-fidelity digital representations is that they can result in large amounts of digital data that has little or no import in terms of conveying meaning. For example, a periodic wave signal that merely repeats the same waveform does not convey much meaning to the person analyzing the waveform, and may in fact just take up storage space with unremarkable data. An additional problem is the repeated sampling, over sampling of such high-fidelity data even though it is otherwise unremarkable. Such over sampling results in wasted processing bandwidth (i.e., processor cycles, and/or power) as well as data bandwidth (data storage space and/or transmission bandwidth).
U.S. Pat. No. 6,785,700 issued on Aug. 31, 2004 with the title “Implementation of wavelet functions in hardware,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 6,785,700 describes an architecture component for use in performing a wavelet transform of a sampled signal, and an architecture including such components. The architecture component includes a multiplier, and a multiplexor to multiplex a number n of filter coefficients onto the multiplier. The multiplier processes n consecutive samples with consecutive coefficients, successive multiplier outputs being stored for subsequent processing to generate an output of the filter after every n samples. The wavelet transform may be a discrete wavelet transform or a wavelet packet decomposition. The architecture component may be configured to multiplex two or more coefficients onto a multiplier. Embodiments are disclosed in which the components are derived from a parameterized description in a hardware-description language.
U.S. Pat. No. 6,976,046 issued on Dec. 13, 2005 with the title “Architectures for discrete wavelet transforms,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 6,976,046 describes a microprocessor structure for performing a discrete wavelet transform operation, the discrete wavelet transform operation including decomposition of an input signal including a vector of rx km input samples, r, k and m being non-zero positive integers, over a specified number of decomposition levels j, where j is an integer in the range 1 to J, starting from a first decomposition level and progressing to a final decomposition level. The microprocessor structure has a number of processing stages, each of the number of processing stages corresponding to a decomposition level j of the discrete wavelet transform operation and being implemented by a number of basic processing elements, the number of basic processing elements implemented in each of the processing stages decreasing by a factor of k from a decomposition level j to a decomposition level j+1.
U.S. Pat. No. 7,346,640 issued on Mar. 18, 2008 with the title “Image processing apparatus supporting both discrete cosine transform and discrete wavelet transform,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 7,346,640 describes an image-processing apparatus supporting both discrete wavelet transform and discrete cosine transform with reduced hardware resources. The image-processing apparatus is composed of an input unit receiving a plurality of pixel data, a controlling unit selecting a desired transform from among discrete wavelet transform and discrete cosine transform, and providing a plurality of coefficients depending on the desired transform, and a processing unit which processes the pixel data using the plurality of coefficients to achieve the desired transform.
U.S. Pat. No. 7,480,416 issued on Jan. 20, 2009 with the title “Implementation of discrete wavelet transform using lifting steps,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 7,480,416 describes compact and efficient hardware architectures for implementing lifting-based DWTs, including 1-D and 2-D versions of recursive and dual scan architectures. The 1-D recursive architecture exploits interdependencies among the wavelet coefficients by interleaving, on alternate clock cycles using the same datapath hardware, the calculation of higher order coefficients along with that of the first-stage coefficients. The resulting hardware utilization exceeds 90% in the typical case of a 5-stage 1-D DWT operating on 1024 samples. The 1-D dual scan architecture achieves 100% datapath hardware utilization by processing two independent data streams together using shared functional blocks. The 2-D recursive architecture is roughly 25% faster than conventional implementations, and it requires a buffer that stores only a few rows of the data array instead of a fixed fraction (typically 25% or more) of the entire array. The 2-D dual-scan architecture processes the column and row transforms simultaneously, and the memory buffer size is comparable to existing architectures. The recursive and dual scan architectures can be readily extended to the N-D case.
U.S. Pat. No. 8,086,304 issued on Dec. 27, 2011, with the title “Physiologic signal processing to determine a cardiac condition,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 8,086,304 describes, that in a method for determining a cardiac condition, a sensed physiologic signal for a period of time including multiple cardiac cycles is received. Using the received physiologic data, a heart beat frequency to be used as a reference frequency is determined. A plurality of harmonics of the received physiologic signal is extracted based on the reference frequency, wherein the harmonics correspond to a plurality of alternans frequencies. Amplitudes of at least some of the extracted harmonics are determined, and are used to determine an alternans indicator value.
U.S. Pat. No. 8,498,177 issued Jul. 30, 2013 with the title “Determining a position of a geological layer relative to a wavelet response in seismic data,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 8,498,177 describes determining a position of a geological layer location in a subterranean formation, by receiving seismic data representing an interaction of the geological layer with propagation of a seismic wave, identifying a source wavelet representing a portion of the seismic wave impinging on a boundary of the geological layer, providing a geological layer template of the geological layer including primary and secondary reflection interfaces associated with reflectivity based on material properties of the geological layer, generating a wavelet response template by applying the source wavelet to the geological layer template using a mathematical convolution operation to model seismic wave interference caused by the primary and secondary reflection interfaces, identifying an extremum of the seismic data, and determining, based on the extremum, the location of the geological layer in the subterranean formation using the wavelet response template.
U.S. Pat. No. 8,595,278 issued on Nov. 26, 2013 with the title “Method and system for unconstrained frequency domain adaptive filtering,” and is incorporated herein by reference in its entirety. U.S. Pat. No. 8,595,278 describes aspects of a method and system for unconstrained frequency domain adaptive filtering, including one or more circuits that are operable to select one or more time-domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time-domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency-domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency-domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency-domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency-domain coefficients.
What is needed is a method and structure that efficiently and accurately captures the underlying waveform, with little or no degradation of the value and meaning of that waveform data. In particular, what is needed is a method and apparatus that tracks and records the properties of a particular frequency component of a complex waveform.